The history of calling conventions, part 2

Foreshadowing: This information will actually be useful in a future discussion. Well, not the fine details, but you may notice something that explains… um… it’s hard to describe. Just wait for it.

Curiously, it is only the 8086 and x86 platforms that have multiple calling conventions. All the others have only one!

Now we’re going deep into trivia that absolutely nobody remembers or even cares about: The 32-bit calling conventions you don’t see any more.


All of the processors listed here are RISC-style, which means there are lots of registers, none of which have any particular meaning. Well, aside from the zero register which is hard-wired to zero. (It turns out zero is a very handy number to have readily available.) Any meanings attached to the registers are those imposed by the calling convention.

As a throwback to the processors of old, the “call” instruction stores the return address in a register instead of being pushed onto the stack. A good thing, too, since the processor doesn’t officially know about a “stack”, it being a construction of the calling convention.

As always, registers or stack space used to pass parameters may be used as scratch by the called function, as can the return value register.

You may notice that all of the RISC calling conventions are basically the same. Once again, evidence that the 8086/x86 is the weirdo. A wildly popular weirdo, mind you.

The Alpha AXP

The Alpha AXP (“AXP” being yet another of those faux-acronyms that officially doesn’t stand for anything) has 32 integer registers, one of which is hard-wired to zero. By convention, one of the registers is the “stack pointer”, one is the “return address” register; and two others have special meanings unrelated to parameter passing.

The first six parameters are passed in registers, with the remaining parameters on the stack. If the function is variadic, the parameters can be spilled onto the stack so they can be accessed as an array.

Seven other registers are preserved across calls, one is the return value, and the remaining thirteen are scratch. 1 zero register + 1 stack pointer + 1 return address + 2 special + 6 parameters + 7 preserved + 1 return value + 13 scratch = 32 total integer registers.

Function names on the Alpha AXP are completely undecorated.

The MIPS R4000

The first four parameters are passed in a0, a1, a2 and a3; the remainder are spilled onto the stack. What’s more, there are four “dead spaces” on the stack where the four register parameters “would have been” if they had been passed on the stack. These are for use by the callee to spill the register parameters back onto the stack if desired. (Particularly handy for variadic functions.)

Function names on the MIPS are completely undecorated.

The PowerPC

The first eight parameters are passed in registers (r3 through r10), and the return address is managed manually.

I forget what happens to parameters nine and up…

Function names on the PowerPC are decorated by prepending two periods.

Postclaimer: I haven’t had personal experience with the MIPS or PPC processors, so my discussion of those processors may be a tad off, but the basic idea I think is sound.

Comments (15)
  1. Serge Wautier says:

    Once again, evidence that the 8086/x86 is the weirdo

    Then all CISC are weirdos !

  2. rentzsch says:

    Curiously, it is only the 8086 and x86 platforms that have multiple calling conventions. All the others have only one!

    The 680×0 Macintosh also had numerous calling conventions. We breathed quite a sigh of relief when PowerPC shipped with a standard calling convention and runtime model. Unfortunately, Mac OS X’s Mach-O runtime model is slightly-different than standard. Sigh.

  3. Florian says:

    Whaddaya mean "The 32-bit calling conventions you don’t see any more"? They may not be mainstream, but neither is this blog.

  4. faux-mr-language-person says:

    "AXP" being yet another of those faux-acronyms

    > that officially doesn’t stand for anything

    since you were mr. language person on the previous post…. you probably mean abbreviation not acronym. (Although arguaply AXP is a pronouncable word "axe-ep")

  5. Raymond Chen says:

    Florian: You don’t see these calling conventions any more because NT stopped supporting the Alpha AXP, MIPS and PPC years ago.

    acronym vs. abbreviation: I know the distinction and considered being more precise but ultimately decided against it for stylistic reasons.

  6. Jack Mathews says:

    Haha, I think people are getting confused because you’re only talking in the context of NT.

  7. Mike Dimmick says:

    Well, you do see MIPS and PPC calling conventions on a Microsoft platform: Windows CE.

    I’ll admit that PowerPC is no longer supported for CE.NET 4.x, but various varieties of MIPS are still supported. While the Pocket PC may now be ARM-only, some custom platforms still use MIPS. I’ve got a MIPS-based Pocket PC (2000) on my desk right now; my own Pocket PC (a Jornada 525) uses a Hitachi SH3 processor.

    SHx and ARM calling conventions are much like the other RISC processors Raymond mentions.

    More details can be found at

  8. BTannenbaum says:

    At one point at DEC we were told that AXP was pronounced Alpha Chi Rho. Marketing eventually gave up on that and just kept the "acronym" because they thought any acronym with an X in it was sexy.

    The entire naming of the architecture was a fiasco. Marketing spent a large pile of money to hire a firm to come up with a name and the best that they could come up with was ARA. Everyone I knew in Engineering hated it, but marketing stuck by it, since they had to justify the money they spent. Then someone discovered that ARA means something nasty in Arabic.

  9. Florian says:

    Oh, I see. Yes, you had me confused there a bit since I see the PPC calling convention quite regularily as we program for PPC, though not running under NT of course. And we even have a MIPS on some boards.

  10. ??????,??????????? ?????????? calling convention: The history of calling conventions, part 1 The history of calling conventions, part 2 The history of calling conventions, part 3 The history of calling conventions, part 4: ia64 Why do member functions need to be…

  11. Flier's Sky says:

    The history of calling conventions

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